A Design Methodology Using the Inversion Coefficient for Low-Voltage Low-Power CMOS Voltage References

A Design Methodology Using the Inversion Coefficient for Low-Voltage Low-Power CMOS Voltage References

The current trend towards low-voltage supply and low-power (LVLP) design is mainly caused by the growing demand for battery-operated portable equipment such as watches, smart phones and implantable devices (e.g., pacemakers and hearing aids). The operation of these circuits for long periods requires a significant amount of energy from the battery. However, battery size is often a limiting facto...

Low Voltage, Low Power CMOS Bandgap References

A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer

Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in liter...

Design of A Low Power Low Voltage CMOS Opamp

In this paper a CMOS operational amplifier is presented which operates at 2V power supply and 1uA input bias current at 0.8 um technology using non conventional mode of operation of MOS transistors and whose input is depended on bias current. The unique behaviour of the MOS transistors in subthreshold region not only allows a designer to work at low input bias current but also at low voltage. W...

Low-Voltage and Low-Power CMOS Voltage-to-Current Converter

A CMOS voltage-to-current converter in weak inversion is presented in this Letter. It can operate for low supply voltage and its power consumption is also low. As the input voltage varies from −0.15 V to 0.15 V, the measured maximum linearity error for the proposed voltageto-current converter, is about 3.35%. Its power consumption is only 26 μW under the supply voltage of 2 V. The proposed volt...